The $450 PCB: AI Can Design Hardware Now. It Can't Verify It.
A developer ran an AI agent on a custom PCB with no human verification. Five assembled boards cost €130. Getting the design right cost $450 in API credits. Generation works. Engineering correctness doesn't — and the market is starting to put a price tag on the missing verification layer.

The $450 PCB: AI can design hardware now. It can't verify it.
A developer on Reddit, handle a6m--zero, ran an experiment: design and manufacture a custom PCB — an RP2350 board with four buttons, a 1.54-inch e-ink display, I2C, exposed GPIO — using Claude Fable 5, under self-imposed rules barring any manual edits or manual verification. The agent got a KiCad MCP integration and was told to report back when schematic design and placement were ready.
The board worked. Five assembled boards cost about €130.
Getting the design right cost $450 in API credits.
Repeated model interactions, including incorrect component selection, stood in for any structured validation step. There was no deterministic check anywhere in the loop — no component-selection verification, no footprint or netlist consistency check, nothing that runs in seconds instead of hundreds of dollars of model retries. Brute-force iteration was the validation layer.
That's the first public price tag on the agent-validation gap in hardware. And it's not the only one this week.
The review nobody's model is passing
Electronics creator Meris Veladzic (@meris.veladzic, 17K followers) posted a walkthrough of a PCB layout attributed to an AI model on September 7 — 3.4K likes, 91 comments. He found concrete engineering flaws: a decoupling capacitor on the input side of a buck converter not aligned with the pin, a switch node he calls "just a fat blob" (bad for EMC), high-power MOSFETs and diodes with no copper planes for thermal management, no optimization for current loops or EMC. High current, switching converters, many signals, no inner ground planes. His verdict: "a total disaster."
The failure was not generation. The board looked right. It was the absence of any engineering evaluation — EMC, thermal, current-loop checks — between the model's output and the verdict. The current workaround is manual expert review of every flaw. No tooling is checking the model's work.
The identity trap
Engineer Ravivarma N (@engineer.meets.ai) debunked the viral claims that AI built a 41-part jet engine from one prompt: GPT-6 Astra generated complex CAD and scored 95.9% on the BenchCAD benchmark (17,900 mechanical parts), but the AI works by "writing CAD code, rendering, checking, and retrying — not true engineering." His example: a part 96.1% geometrically identical but functionally wrong, because a hole was sealed. The outputs lack tolerances, GD&T, materials data, and manufacturing intent — and he reports AI output "often takes longer to fix than to redraw."
Geometric similarity is being used as a proxy for engineering correctness, and it fails on exactly the dimension that matters: whether the thing still works.
Capability 92%, reliability 43%
Electronics educator Sanchit Kulkarni (@chip_camp) addressed the same question on September 12 — whether a current model can design complete PCB layouts on its own — and framed it as capability versus reliability. His video's on-screen graphic shows an 18-month picture where capability rose to 92% while reliability reached only 43%. His closing point: hardware errors can't be fixed with a software update.
Four voices, one diagnosis
These are four independent sources in one week:
| Signal | What works | What's missing |
|---|---|---|
| a6m--zero's Fable 5 build | The board was designed and manufactured | A validation step cheaper than $450 of retries |
| Veladzic's review | The layout looked right | EMC, thermal, current-loop checks |
| The CAD reality check | 96.1% geometric identity | Feature-identity and manufacturability checks |
| Kulkarni's capability/reliability split | Generation at 92% | Reliability at 43% |
The market has split the problem in two: generation and engineering correctness. Generation is good enough. Engineering correctness — manufacturable, correct-by-physics, reviewable — has no tooling. The eval gap is where the money now flows: $450 of compute, six hours of babysitting, manual review issues on every board.
One tempering note, from the sweep: the Fable 5 build ultimately worked. A no-human-verification agent flow produced a functional board. So the gap is economic, not absolute. That's what sharpens the wedge — the buyer is not "make it possible," it's "make it affordable."
Build the verification layer
The pattern is the same one we keep seeing in this industry: the market hand-builds what should be infrastructure. Deterministic checks for AI-generated PCBs — bypass-cap placement, switch-node geometry, thermal copper coverage, footprint and netlist consistency — are checkable in seconds. Feature-identity assertions on generated CAD — is the hole still there, is the tolerance complete, does the part still manufacture — are checkable before a human opens the file.
ProductFlo's position: verification is the merge gate for agent-driven hardware. Agents propose the change; a deterministic evaluation layer scores it against the engineering constraints; a human approves the diff. That's the layer the $450 was paying for, one model retry at a time.
Sources: a6m--zero / Claude Fable 5 PCB build; Meris Veladzic's review (Instagram, 2026-09-07; documented post summary — page login-walled); Ravivarma N's CAD reality check (Instagram, 2026-09-11; documented post summary — page login-walled); Sanchit Kulkarni on capability vs. reliability (Instagram, 2026-09-12; documented post summary — page login-walled).
Stop bad hardware changes before they ship.
30-day pilot on one active product. Fixed $8k. Live on your own BOM in week one.