digital-fpga-ecosystem (laplacian-n)ECADConfidence: Medium
the board XDC names DIN/DOUT from the FPGA side, so DIN on pin G4 is data coming into the FPGA (the MCP3208's DOUT), but the editor's BOARD_PINS table read them as the chip's pins and swapped them, so a design using adc:din/adc:dout never got a reading; the same PR found library blocks driving seg(0) as segment a while the auto-pin rule assumed the top bit was a, scrambling 7-segment digits and landing ADC ports on LEDs.
From the Grok pain-radar digest, Oct 25-26 2026 (Oct 25 daytime to Oct 26 morning slots). Verified live 2026-10-26: issue/PR read on GitHub; title and state confirmed.