After importing an Altium board into KiCad, DRC ran on KiCad's defaults, 0.2 mm clearance and 0.5 mm to the edge. The author's 10 mil track and clearance, via sizes, mask rules and room-scoped rules were never read, so the board passed or failed against rules nobody wrote. The current workaround is a per-board fix_pcb.py script.
From the Grok pain-radar digests, Oct 31-Nov 1 2026 (Oct 31 9:41 PM ET through Nov 1 7:41 AM ET digests plus the Haitch overnight edition). Verified live 2026-11-01: issue/PR read; title and state confirmed.