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KiCadRoutingTools (drandyhaas)ECADConfidence: Medium

The drc lens runs check_drc at 0.1 clearance margin while board_score uses 0.05, so one line prints NO DRC VIOLATIONS FOUND and the other BLOCKING=1 for the same board.

Impact Analysis

Persona
Electrical Engineer
Team Size Impact
5x Multiplier
Prototype Delay
3 Days
Est. Annual Cost
$30,000
  • 1 user · 1 month240 min
  • Rest of team960 min
  • Rest of year13,200 min

monthly_minutes × 12 × team_multiplier ÷ 60 × $75/hr = $30k/yr

$75/hr assumed rate.

Annual team-minutes decomposed from the reported monthly inputs.

Evidence & Sources

1 Sources
drandyhaas/KiCadRoutingTools Issue #1595: plan-pcb-placement verifier.md grades check_drc at --clearance-margin 0.1 while its board_score line grades at 0.05: the drc lens passes a graze its own score blocks
github.com
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Analyst Notes

From the Grok pain-radar digests, Nov 1-2 2026 (Nov 1 8:41 AM ET through Nov 2 7:41 AM ET digests plus the Haitch editions). Verified live 2026-11-02: issue/PR read; title and state confirmed.