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tscircuit (AI PCB design agent backend)ECADConfidence: Medium

An LLM-generated tscircuit design wrote holeDiameter on a hole element, a natural guess since platedhole and via use that prop name. The zod schema silently stripped the unknown key instead of rejecting it, leaving a null-diameter hole that turned into NaN bounds in the autorouter. Compilation reported 0 errors while the entire autoroute pass died for every net on the board; the crash only showed in stderr.

Impact Analysis

Persona
Electrical Engineer
Team Size Impact
5x Multiplier
Prototype Delay
1 Days
Est. Annual Cost
$12,000
  • 1 user · 1 month180 min
  • Rest of team720 min
  • Rest of year9,900 min

monthly_minutes × 12 × team_multiplier ÷ 60 × $75/hr = $12k/yr

$75/hr assumed rate.

Annual team-minutes decomposed from the reported monthly inputs.

Evidence & Sources

1 Sources

Analyst Notes

From the Grok Haitch pain-radar compilation, finding 41, found 2026-09-27, score 9/10. Verbatim evidence: "Printed to stderr during render (compile itself reports 0 errors)" and "the entire autoroute pass dies, for every net on the board." Cost model assumes the bad prop is bisected and fixed, with the lost compile-debug cycle as the main cost.