CircuitGenome
Automated analog circuit designer: SPICE-gated op-amp topology synthesis and recognition in Python.
What it does and how it connects
CircuitGenome is a Python toolkit for analog circuit topology synthesis and recognition, focused on op-amp design. A complete circuit is assembled from independent functional building blocks (differential pair, load, tail current, bias, compensation, and output stage), and by enumerating every valid combination of block implementations it can generate thousands of structurally distinct op-amp netlists for dataset generation, automated design exploration, or topology studies.
It works in both directions. Going forward, it constructs and sizes op-amps from building blocks and a performance specification. Going backward, it reads a flat SPICE netlist and recovers its structure, identifying subcircuits (differential pairs, current mirrors, cascode loads, bias generators, CMFB, compensation) and assigning each to its functional role. An end-to-end designer chains these layers together, keeping only the circuits whose ngspice-measured metrics meet the spec.
Initial sizing computes minimum transistor W/L values that satisfy DC specs (gain, GBW, phase margin, slew rate, CMRR) through an OR-Tools CP-SAT solver and a gm/Id flow. It covers one-, two-, and three-stage op-amps, single-ended and fully differential, including nested-Miller and reversed-nested-Miller compensation. New module variants can be added by editing a YAML file, with no code. It installs from PyPI as circuitgenome and needs Python 3.9 or newer.
Alternatives
Compare side by side- Lunima
A photonic integrated circuit design tool with live simulation, rather than an analog op-amp synthesis toolkit.
- AgentPIC
An agent-native photonic circuit EDA, rather than an analog op-amp topology synthesis toolkit.
- Xyce Studio
A desktop GUI for the Xyce circuit simulator, rather than an op-amp topology synthesis and sizing toolkit.
- ltspice-mcp
An MCP server for SPICE simulation through LTspice and ngspice, rather than an op-amp topology synthesis toolkit.
Recurring errors it addresses
Error Index entries this tool is built to reduce or work around.
- An automated op-amp sizer predicted about 22% more gain-bandwidth than ngspice measured (31.9 vs 26.0 MHz) because a tail current source delivered 0.90 of its intended current while the headroom check passed.Error Index
- An analog sizer's railing gate withholds predicted gain on 47 of 942 simulated circuits, all 47 false positives that SPICE biases and measures fine, because the gate compares the voltage gap against Vdsat, argued to be the wrong tolerance.Error Index
Sources
Not verified
- Pricing: none stated on the repo or docs site.
- Real user voices: recent repo activity is the maintainer's own issues and pull requests.
Last verified November 6, 2026. Listings are informational. The evidence score measures public, verifiable evidence and is not an endorsement or a compatibility claim.