KiCad 10 writes a pad's net as (net 'GND') with no number, and copperline parses the first atom as a number, so it fails with 'bad number '+12V' in pad net'. The reporter sees it on 7 upgraded boards and on boards from another KiCad 10 generator. KiCad's own Specctra export also writes a boundary form the DSN reader does not take.
Recurring agent failure issue in copperline (iamdarshg)
What engineers report
A recurring agent failure problem in copperline (iamdarshg) that mostly hits the electrical engineer.
Failure pattern: agent / failure
Analyst note
From the Grok pain-radar digests, Nov 10-11 2026 (Nov 10 8:41 AM ET through Nov 11 7:41 AM ET digests plus the Haitch editions). Verified live 2026-11-11: issue/PR read; title and state confirmed.
What it costs a team
Modeled annual cost
$30,000
For a team of 5
Prototype delay
3 days
Modeled schedule slip per occurrence
Time lost
240 min
Per engineer per month, about 1 incidents
How the cost is modeled
240 min/month × 5 engineers × 12 months = 240 hours × $125/hour = $30,000
A modeled estimate with medium confidence. Swap in your own team size and loaded rate to size it for your team.
Engineering tools that address it
No engineering tool profile lists this error yet. Browse tools that connect to copperline (iamdarshg).
Evidence
More recurring errors in copperline (iamdarshg)
- Eight curated boards that were legal going in came out of the router with copper DRC violations (56 on one, 11 on two others). Routes from each epoch get committed with no local legality check or rollback; the final verifier refuses COMPLETE only after the bad copper is already in.ECAD · impact 74
- New tools/verify_rules.py is billed as per-board manufacturability verification but fails open: if router analyze fails or returns no nets, the width loop skips every trace and prints 0 below required width instead of not checked; it checks file existence, not return codes, and never clears last run's report JSONs, so a failed route can be scored against an old board's report, and main() always exits 0 even with illegal DRC or failed RF/thermal validators.ECAD · impact 74
- On a 160x100 mm, 12-layer, 842-pad board that started at 0 DRC errors, the BGA escape stage committed 170 vias and stubs and produced 90 copper clearance violations, with only 405 of 842 pads connected, and each stub checked when planned, never against copper already committed.ECAD · impact 74
- A PCB routing benchmark dedupes boards by rounded size, layer count, net count and pad count, before checking legality. Distinct legal boards get dropped, and an illegal board can knock out a later legal one with the same counts, biasing completion and legal-rate claims.ECAD · impact 66
- The synthetic routing corpus generator puts different-net pads on top of each other (0.28 mm and 0.32 mm overlaps) before routing starts. The harness records input_legal but still counts those boards, so invalid inputs show up as router failures in the metrics.MCAD · impact 66
Sourced from public community reports. Costs and delays are modeled estimates, not measurements. Know a better source or a fix? Tell us at hello@productflo.io.