DRC skipped clearance pairs inside one physical copper island, so a short between two intended nets could pass. The repro: merge two nets, route a bridge, then delete the joining schematic wire and accept the split while the copper stays. The schematic says two nets, the copper says one, and DRC said nothing. The fix adds an explicit short finding.
Recurring agent failure issue in pcbcraft (tangency-labs)
What engineers report
A recurring agent failure problem in pcbcraft (tangency-labs) that mostly hits the electrical engineer.
Failure pattern: validation / false pass
Analyst note
From the Grok pain-radar digests, Nov 11-12 2026 (Nov 11 8:41 AM ET through Nov 12 5:41 AM ET digests plus the Haitch editions). Verified live 2026-11-12: issue/PR read; title and state confirmed.
What it costs a team
Modeled annual cost
$30,000
For a team of 5
Prototype delay
3 days
Modeled schedule slip per occurrence
Time lost
240 min
Per engineer per month, about 1 incidents
How the cost is modeled
240 min/month × 5 engineers × 12 months = 240 hours × $125/hour = $30,000
A modeled estimate with medium confidence. Swap in your own team size and loaded rate to size it for your team.
Engineering tools that address it
No engineering tool profile lists this error yet. Browse tools that connect to pcbcraft (tangency-labs).
Evidence
More recurring errors in pcbcraft (tangency-labs)
- A symbol carries only a footprint name string and pins have free-text types; the proposal is one verified part record joining symbol, footprint, datasheet requirements and 3D body.ECAD · impact 66
- Delete the highest-numbered component, save, reopen, and its ID could be handed to a new object, so anything still referring to it pointed at the wrong thing. The fix saves an allocation watermark.ECAD · impact 66
- Per-footprint clearance and mask and paste overrides in KiCad library files were dropped at import, so DRC checked fine-pitch parts against the looser board-wide rule.ECAD · impact 66
- Renaming a symbol pin meant removing it and retyping the full pin definition, which dropped its net attachments and no-connect flag, and swapping two pin numbers needed two edits with an invalid state in between.ECAD · impact 66
- The starter library gives generic resistors 1k and caps 100nF, placement copies them in, and validation only needs a non-empty value, so an unspecified part looks chosen. The issue also says DNP and BOM exclusion have different consumers and must not be text conventions.ECAD · impact 66
- Today a schematic deletion removes the physical footprint right away. The PR adds an accepted board baseline so footprints, positions and pad connections hold until a reviewed update, the way KiCad's Update PCB step works.ECAD · impact 66
Sourced from public community reports. Costs and delays are modeled estimates, not measurements. Know a better source or a fix? Tell us at hello@productflo.io.