core (tscircuit) errors

18 recurring problems engineers report in core (tscircuit), ranked by impact.

#18 by errors trackedECAD

Recurring core (tscircuit) errors, by impact

  1. 1A generated schematic dropped the VBAT net label on paired power pins: U1.BAT1 and BAT2 and C17.2 all connect to net.VBAT in source, but the schematic wired the two chip pins together with no VBAT label so they ended up separate from C17 (confirmed with KiCad's native netlist).ECAD · Agent failure · 1 report74
  2. 2A JSON save and import round trip flips an antenna feed pad from masked to unmasked, adding a solder-mask opening that should not exist, and a wider 60-pad test lost ten coverage flags and thirty mask margins.ECAD · Agent failure · 1 report74
  3. 3A standard usb_c connector resolved to a different footprint over time because the JLC parts engine ranks by stock and ignores the manufacturer part number, with the snapshot flipping from a through-hole part to JLC C2765186 with no code change, and setting manufacturerPartNumber did not pin it.ECAD · Agent failure · 1 report74
  4. 4A trace written to U1.pin2 quietly attached to an internal pad port instead, with no error, so the net never reached the copper.ECAD · Agent failure · 1 report74
  5. 5Companion core PR in the rotation stack, confirmed red on main with expected 0, received undefined for the rotation value.ECAD · Agent failure · 1 report74
  6. 6Core PR in the rotation stack: core leaves schematic_component.rotation unset even after the visual MOSFET rotation fix shipped, and this PR emits the angle; both PRs are blocked on publish order.ECAD · Agent failure · 1 report74
  7. 7Native copper text bridged two separate autorouted signal nets and core reported zero Circuit JSON errors.ECAD · Agent failure · 1 report74
  8. 8A connector built through the direct and cached render paths should give one J1 footprint with F.Paste and B.Paste openings, but both paste records have no owner and the KiCad export carries two extra paste-only footprints. The repro is checked in as failing tests, with the fix in PR #5341.ECAD · Agent failure · 1 report66
  9. 9A team on a 2-layer board wants tented ground vias but the design language has no tenting property, and the SVG renderer draws tented and untented vias the same even with solder mask on. Their workaround is their own packaging adapter that hides it. Both opened in September, active again tonight.ECAD · Agent failure · 1 report66
  10. 10All six top/bottom anchor cases in getPcbTextBounds put the Y offset in the wrong direction, so silkscreen overlap checks ran against a box on the wrong side.ECAD · Agent failure · 1 report66
  11. 11An autorouting cache hit restored the traces but dropped the physical jumper components and pads: 3 jumpers and 24 pads cold versus 0 on the warm render.ECAD · Agent failure · 1 report66
  12. 12Crystals did not carry display frequency or load capacitance, so schematic labels needed special fallbacks and the BOM export dropped frequency entirely; the author also had to stop 32.768 kHz being rounded to 32.8 kHz.ECAD · Agent failure · 1 report66
  13. 13Every standalone via triggers a 'missing courtyard' warning and the KiCad export writes an empty reference that native DRC flags. Their workaround is their own packaging adapter that hides it. Both opened in September, active again tonight.ECAD · Agent failure · 1 report66
  14. 14LCSC part C6800644 drops six programming-header labels, and C160316 drops L, NC and N, on a real Wi-Fi switch board. Pin labels are what a person reads when plugging in a programmer or mains, and they vanish on import.ECAD · Agent failure · 1 report66
  15. 15Setting a component's layer overwrote the top and bottom layers the footprint author set on each pad. An unmodified KiCad library footprint, the Amphenol 132289 edge-mount SMA, has three front pads and two back pads, and the importer put all five on one side. The fix keeps both faces and swaps them when the part is flipped. That is copper on the wrong side of the board from a stock library part.ECAD · Agent failure · 1 report66
  16. 16The transistor component had a fixed pin order while common SOT-23 BJTs use a different order, and there was no way to remap because the schema stripped the pinLabels prop; a board could be built wrong without any error.ECAD · Agent failure · 1 report66
  17. 17When a group of components was auto-packed, a keepout owned by that group stayed at the board origin while its components moved away, and rectangular keepouts also needed width and height swapped on quarter turns, with all four new regression tests failing on the old code.ECAD · Agent failure · 1 report66
  18. 18With tab-routing and a 2 mm border radius, a 2 x 2 panel gets 1056 cutouts, 1024 of them under 0.1 mm wide, and each corner comes out of the Gerbers as tiny slots. Without the radius it's 32. Nothing flags it before fab output.ECAD · Agent failure · 1 report66

How it fails

  1. Agent failure18

Engineering tools that address these errors

Sourced from public community reports. Costs and delays on individual entries are modeled estimates, not measurements.