PCB_Autorouter_Search_Algorithm_Visualizer

This is an interactive AI-powered single-layer PCB autorouter with a search-algorithm visualizer. It demonstrates and benchmarks eight artificial-intelligence pathfinding and search algorithms on a discrete PCB grid: breadth-first search, depth-first search, depth-limited search, iterative deepening search, uniform cost search (Dijkstra), greedy best-first search, A* search with Manhattan and Euclidean heuristics, and bidirectional search.

The routing engine works on a 50 mm by 40 mm board layout (a 10 by 8 grid with 5 mm pitch) with component placement (resistors, ICs, headers, capacitors and more), pin-to-pin netlist routing, obstacle avoidance and clearance rules, multi-net conflict detection and automated rip-up and reroute. The visualizer shows step-by-step path exploration and the search tree, with real-time performance metrics (nodes explored, path cost, execution time), and layouts can be saved and loaded through a serverless API. A live demo is deployed on Vercel.