Silinx-ISE

Open-source FPGA design environment in the Xilinx ISE 14.x style for teaching: VHDL/Verilog, schematics, Yosys synthesis and place-and-route for Spartan and Nexys boards.

ToolchainOpen sourceActiveECADEmbedded

What it does and how it connects

Silinx ISE is a reprogrammable-hardware design platform in the style of the Xilinx ISE 14.x Project Navigator, built for teaching digital systems after AMD and Xilinx discontinued support for Xilinx ISE. It is an independent open-source project, not affiliated with, endorsed by or supported by AMD or Xilinx. The name breaks down as SI for Super Intelligence, since the tool was generated by an AI, and linx for the programmable links of an FPGA.

Projects hold VHDL and Verilog modules in mixed language, with implementation and simulation roles, UCF constraints and ISE project import and export. The HDL editor has syntax highlighting, context-aware auto-complete, go to definition, rename symbol, quick fixes and live errors with explanations and fixes in English and Portuguese. The schematic editor follows the ISE Schematic Editor style, and any HDL module can be converted to a schematic. FSM and ASM editors, truth tables, K-maps, waveforms and a board emulator are included.

It ships its own toolchain, Yosys synthesis with its own place and route and bitstream writer, for the Basys2 and Nexys2 boards. For the other boards and the ISE-only processes it can use the free Xilinx ISE 14.7 WebPACK tools, which the user installs separately.

  • digital-chip-design-agents

    Sixteen plugins covering the full digital chip pipeline including an FPGA emulation domain, rather than a teaching environment in the ISE 14.x style.

  • OpenVLSI

    A macOS-first chip-design suite in rebuild with Yosys and OpenROAD backends, rather than a browser teaching environment for Xilinx FPGAs.

Sources

  1. 1READMEgithub.com
  2. 2Release v15.22.1github.com

Not verified

  • Pricing (none stated on the repo)
  • Real user voices (recent issues are the maintainer's own design-check reports)
  • Related Error Index entries (no ISE entry exists in the Error Index)

Last verified November 6, 2026. Listings are informational. The evidence score measures public, verifiable evidence and is not an endorsement or a compatibility claim.