roark (jaylamping) errors
11 recurring problems engineers report in roark (jaylamping), ranked by impact.
#40 by errors trackedECADMCAD
Recurring roark (jaylamping) errors, by impact
- 1Moving the rev B5 power board (E-stop banks, limb breakers) between repos exposed that check.py, the sims and the build script did not fail when a check failed or did not run. A 'parity: 0 differences' result is now marked untrusted because the old import stage ran parity with no schematic beside the board and hid KiCad's output.ECAD · Agent failure · 1 report74
- 2On a 54 V power board, the schematic-parity check never ran in the layout folder, hiding a stale J24 pinout. Turning it on produced 70 parity warnings and J24 pads 6 to 12 had to be re-netted and re-routed, while DRC reported 0 shorts the whole time.ECAD · Agent failure · 1 report74
- 3Over five days on a humanoid robot's left arm, requirements (a 5 kg sweep, the hand bay, a clean outer skin) arrived after CAD had started and each forced a redo. Print checks were added one at a time, each after a defect reached a print, including a 1 mm interference and stale FEA reported as a pass, and what a print taught them lived only in chat.MCAD · Agent failure · 1 report74
- 4Roark's left arm CAD moved over from a repo called marengo, but the halves are named shell_front and shell_back while the scripts call them upper and lower, joined by a mapping file. The FEA scripts, master part script and forearm checks did not come over, and ua_parts.py has not been rerun from the new paths because it needs a SolidWorks rebuild. A test fixture used to copy the real exports.json, so the first real export broke a test.MCAD · Agent failure · 1 report74
- 5Claude Code scripted and auto-routed a six-layer power distribution board. DRC passes with 0 clearance violations, yet 67 connections on 45 nets are still open, with a 4 to 7 hour hand-finish estimate, and VBUS copper is about 24 mm against 27.5 mm needed.ECAD · Agent failure · 1 report66
- 6Once CAD went into git, two failures stayed silent: an export can drift from the part it was made from, and a committed assembly can point at a file nobody else has. The fix is a script that hashes the export and its source part into a manifest, plus a SolidWorks API check that fails missing, scratch, gitignored or uncommitted references.MCAD · Agent failure · 1 report66
- 7Power board routing stalled with about 150 nets open. Gate clamp zeners sat about 15 mm from their FETs and 65 GND pads had no path to the plane, and the review fixes have not yet been run in KiCad.ECAD · Agent failure · 1 report66
- 8Renaming a robot power board touched 51 KiCad files, libraries, Gerbers and placement CSVs, and the team leans on its own verify scripts to prove nothing moved. verify_board.sh and verify_buck.sh check DRC, unconnected nets, parity, fab_check and bom_check, and a self-test feeds them broken inputs. The only Gerber difference was the %TF.ProjectId header, because KiCad derives a UUID from the project name, and the old name still shows up 73 times in 22 other files.ECAD · Agent failure · 1 report66
- 9Renaming one footprint on a buck board meant the schematic, both BOMs, the kit row and the position file all had to follow. The trigger was cost: four 0.2 mm thermal vias were the board's only holes under 0.3 mm, and a 0.2 mm smallest drill roughly doubles the fab's price. Moving them to 0.3 mm meant a new board-local footprint, and the rename cascaded into five places.ECAD · Agent failure · 1 report66
- 10Six layers at 1 oz quoted $44 against $96.47 for four layers at 2 oz (qty 5). The author made tools/stack.py the single stackup definition every script reads, but board checks run by hand, 461 connections are still unrouted, and whether 1 oz copper can carry 60 A is unproven.ECAD · Agent failure · 1 report66
- 11The LM5146 54 V to 12 V, 12 A board had a schematic and parts list but no PCB, and has to ship in the same fab order as the main power board. While laying it out, C2 was found to be a 12.5 mm can on a 10 mm land, so it never fitted, and C24's pads had to widen for the chosen part. The author wrote verify_buck.sh with DRC and schematic parity as hard errors, an E-stop spacing check of 1.5 mm from 54 V copper, pour widths, fab_check and bom_check, plus a self-test that feeds 20 broken inputs.ECAD · Agent failure · 1 report66
How it fails
Sourced from public community reports. Costs and delays on individual entries are modeled estimates, not measurements.