synth (absmach) errors

12 recurring problems engineers report in synth (absmach), ranked by impact.

#37 by errors trackedECAD

Recurring synth (absmach) errors, by impact

  1. 1A board can pass KiCad DRC and still fail JLCPCB's free DFM tool. Their CM4 carrier did exactly that, and their rebuilt JLC-style checks still read plated hole to trace as 0 against JLC's 3 Danger and 55 Warning. Danger findings now block release exports with no override.ECAD · Agent failure · 1 report74
  2. 2A post-route via mover pushed four of six thermal vias out of U1's exposed pad while the README and QUALIFICATION.md still claimed six. Only a human review of docs against copper caught it, and the compaction loosened decoupling (C2 moved from 1.46 mm to 4.07 mm from VIN).ECAD · Agent failure · 1 report74
  3. 3For a two-board BLDC stack (control plus 24 V/10 A power), the 20 board-to-board pin pairs live in one mapping file. Before this PR the multiboard tool only checked that the named board and component existed, and with the 20 real mappings it returned 20 times 'Unknown source board'.ECAD · Agent failure · 1 report74
  4. 4synth_export over MCP reported a board fabrication-ready with no missing footprints while the CLI refused the same board on part hdc1080_rh_t, whose WSON-6 footprint is not in the library, because the footprint check lived only in the CLI.ECAD · Agent failure · 1 report74
  5. 5A board qualification matrix ran in CI on ubuntu-latest, which quietly installed KiCad 9.0.8 instead of 10. Every DRC came back unknown and every row was marked fail. The fix pins the OS and KiCad version and adds a separate 'unknown' verdict so a missing DRC no longer looks like a failed board.ECAD · Agent failure · 1 report66
  6. 6An AI-generated 24 V to 3.3 V buck board is going on a public showcase page that says plainly it is not fabricated or tested, has no expert sign-off, and that synth check --fab disagrees with the published FreeRouting record. Two parts have no registry sign-off, and the board needs filled and capped via-in-pad.ECAD · Agent failure · 1 report66
  7. 7An earlier split-ground board left two isolated DGND pours after routing, so the board moved to one GND plane. Merge conflicts were resolved by hand, and a tighter outline left an untied GND copper fragment that needed a stitching via.ECAD · Agent failure · 1 report66
  8. 8Auto-routed GND stubs 0.05 mm from the edge at a corner mounting hole block release, but only when a header sits at one position. A positional edge case in the autorouter output.ECAD · Agent failure · 1 report66
  9. 9FreeRouting finished its route, but the in-process KiCad stitch step got a bare SwigPyObject and crashed before DRC ever ran.ECAD · Agent failure · 1 report66
  10. 10In a board generator, the router and project file use JLCPCB's 0.56 mm minimum via but the board setup hardcodes 0.60 mm, so kicad-cli DRC throws blocking errors on vias that are legal at the fab.ECAD · Agent failure · 1 report66
  11. 11The 3D-model check only looked in the system KiCad install, so parts whose STEP lived under the repo's step-models folders were flagged on the RTD and buck boards. It now also looks there, matching by file name only.ECAD · Agent failure · 1 report66
  12. 12The KiCad exporter placed a net label at a segment midpoint and silently merged RXD1_MCU into MODEM_IDLE, while the part registry gave two CH342F pins the same TNOW1 name.ECAD · Agent failure · 1 report66

How it fails

  1. Agent failure12

Engineering tools that address these errors

Sourced from public community reports. Costs and delays on individual entries are modeled estimates, not measurements.