IHP-Open-PDK
130 nm BiCMOS open-source PDK for analog, mixed-signal and RF design.
What it does and how it connects
The IHP Open Source PDK is a 130 nm BiCMOS open-source process design kit for analog, mixed-signal and RF design, targeting the SG13G2 process node. Its goal is a fully open-source PDK and related data that can be used to create manufacturable designs at IHP's facility. SG13G2 is a 0.13 um CMOS process with SiGe:C npn-HBT devices up to 350 GHz transition frequency and 450 GHz oscillation frequency, thin gate oxide for 1.2 V digital logic, thick oxide for 3.3 V, and a backend of 5 thin metal layers, two thick metal layers and a MIM layer.
Contents include a base cellset, IO cellset and SRAM cellset (CDL, GDSII, LEF, Liberty, SPICE netlist, Verilog), primitive devices, and KLayout tool data with layer property and tech files plus DRC and LVS rules. Documentation is at ihp-open-pdk-docs.readthedocs.io, covering installation, setup for supported EDA tools, device libraries, layout rules, process specifications and design flow examples.
IHP states the existing content is preview only: while the SG13G2 node and the PDK it derives from have produced many designs manufactured in significant quantities, the open-source PDK is not intended for production use at this moment. The project acknowledges public funding from the German IHP Open130-G2 and FMD-QNC projects.
What engineers report
During transient simulation with a sinusoidal input signal of sin(0 1 915MHz)... we observe a leakage current flowing from the diode's Tie connection to GND. Are there any recommended approaches to reduce or eliminate this leakage current?
2026-11-06Read the original
Alternatives
Compare side by side- klayout-tools
Standalone Python tools that let AI agents parse, analyze and manipulate chip layouts headless, rather than a process design kit.
- OpenROAD
The unified RTL-to-GDS application for synthesis through sign-off, rather than a process design kit.
- vibe-ic
A Claude Code plugin that drives a full IC flow from natural-language intent, rather than a process design kit.
Recurring errors it addresses
Error Index entries this tool is built to reduce or work around.
- The IHP SG13G2 LVS deck last synced in June 2024 missed the PDK top-port check, so a design with routing cut behind an IO pin still printed netlists match.Error Index
- On IHP sg13g2, KPEX 2.5D errors out on PCell inductors and HBTs because the tech info does not model the inductor pin layer or emitter window and has no device mapping for inductors.Error Index
Sources
Not verified
- Pricing: none stated on the repo.
- The PDK is preview only per IHP; it is not intended for production use at this moment.
Last verified November 6, 2026. Listings are informational. The evidence score measures public, verifiable evidence and is not an endorsement or a compatibility claim.