kicad-tools (rjwalters) errors

62 recurring problems engineers report in kicad-tools (rjwalters), ranked by impact.

#1 by errors trackedECAD

Recurring kicad-tools (rjwalters) errors, by impact

  1. 1A post-route pour-completion step adds GND and +3.3V vias and traces without ever reading the voltage map, with measured gaps including 0.400 mm where 1.60 mm was required next to a 150 V net, and the run ends with no warning.ECAD · Agent failure · 1 report74
  2. 2A whole-board 'kct optimize-traces --drc-aware' pass on a freshly routed 4-layer JLCPCB board left 9 shorting items that kicad-cli DRC then found. The DRC-aware rollback was supposed to undo any merge that made DRC worse, and it did not catch them.ECAD · Agent failure · 1 report74
  3. 3A wire-reinforced run (a bus wire soldered along an exposed trace) stands 1-2 mm off the board, but no check treats it as a physical object. On a real 4-layer mains board, 4 of 9 runs passed under same-side parts: a 5 W resistor body, three terminal blocks and the edge of two TO-220 courtyards. The tool's checks, KiCad DRC and the readiness gate all stayed green and said READY. A person found it in the fab's gerber viewer.ECAD · Agent failure · 1 report74
  4. 4Analog (0.2 mm) and clock (0.25 mm) copper was routed first and preserved, then Signal nets (0.1016 mm) were routed around it. kicad-cli DRC finds 7 violations, for example SPI_SCK via 0.183 mm from an analog track that needs 0.2 mm, and NRST 0.224 mm from the oscillator pad that needs 0.25 mm. KiCad uses the larger of the two classes; the router used its own, and its post-route validation flagged none of them.ECAD · Agent failure · 1 report74
  5. 5Board 03 seed 43 finished 25 of 27 nets with Manufacturable False while seed 42 finished 27 of 27; the 20 open links were GND and VCC pour links because the pour stage hit its deadline after 516.6 s of a 600 s budget, and the output looked the same as the closer tried and failed.ECAD · Agent failure · 1 report74
  6. 6current-paths-audit (v0.25.0) marks a textbook Kelvin shunt tap (pad, short stub, via, sense IC pin) as ambiguous, while before the fix the INA181 taps joined force-bus copper 3 to 11 mm from the shunt, a real Kelvin error of roughly 10 to 30%, and the audit resolved all three paths through R9 without complaint; so the audit approved the broken board and flags the corrected one, and asks for a kelvin_taps spec field to declare intent.ECAD · Agent failure · 1 report74
  7. 7Every gate the tool runs (DRC, ERC, LVS, detect-mistakes, tapeout, EE review) asks whether the board matches the schematic, and none asks whether the schematic matches the parts' datasheets. A wrong schematic passes all of them, because the board faithfully implements it. The faults: an output filter built from decoupling values (-21 dB at 100 Hz, -56 dB at 20 kHz), DAC mode straps grounded while the I2C bus was wired with pull-ups, and a Schottky drawn to ground so a Schmitt input could never pass about 0.3 V.ECAD · Agent failure · 1 report74
  8. 8Fix PR for #8078 that names a deadline stop as its own outcome but leaves the exit code alone, so a timeout still cannot be told apart from a genuine routing failure.ECAD · Agent failure · 1 report74
  9. 9Gates 1 to 8 pass and kct export says 78 of 78 BOM lines verified, 1 declared exempt (J2, consigned). kct readiness then fails on 'J2 lacks a procurement identifier' and also wants 16 files from older board revisions (v25 to v32 rule files, KiCad schematic backups) inside the project zip. Both new 0.29.0 commands, tapeout sign-off and submit to JLCPCB, need that readiness receipt, so the board cannot go out.ECAD · Agent failure · 1 report74
  10. 10kct check reported 29 redundant_copper_covered findings on a 4-layer board, each ending 'removable with kct pcb prune'. Prune cleared 16 over two passes, then 13 T-joints stayed no matter how many more passes ran. The reporter removed each covered segment and split the longer one by hand, and one split exposed a dead-end spur the overlap had been hiding.ECAD · Agent failure · 1 report74
  11. 11kct export --mfr jlcpcb rewrites the rules file with per-net floors of 12.7 mm and 132 mm for nets carried by wire-reinforced runs that have evidence-bound waivers. KiCad DRC on the same board goes from 0 errors to 199 track_width errors. The summary does not mention the rewrite and there is no flag to turn it off.ECAD · Agent failure · 1 report74
  12. 12kct pcb reinforce on a 4-layer mains board placed 57 anchors, but only 16 survive the board's HV class floor of 0.4 mm, the IEC 60664 pairwise table of 1.6 mm between 150 V and 3.3 V, and the 0.5 mm hole-to-hole rule; KiCad DRC flagged 17 clearance errors and some anchors sat on connector and TO-220 pin holes, even though kct route and kct creepage both know these requirements.ECAD · Agent failure · 1 report74
  13. 13kct report generate warns that diffpair_length_skew and three other rules are INACTIVE and "will silently pass", even with the board's net_class_map.json sitting right next to it. kct export and kct check load that same file for the same board. The report collector is built without the sidecar path. So the document a reviewer reads says less was checked than export actually checked, or nothing at all if you only run the report.ECAD · Agent failure · 1 report74
  14. 14kct route laid a new I2C net on F.Cu through two of four mounting-hole keep-out areas on a private 4-layer consumer board, and kicad-cli 10.0.8 DRC reported 2 items_not_allowed while the router reported nothing. The fix PR measured the cause: the search avoided the area with a 218-segment detour, but the post-route optimizer treated the keep-out cells as free and collapsed the detour into a straight line through it.ECAD · Agent failure · 1 report74
  15. 15KiCad 10.0.7 silently ignores an entire .kicad_dru rules file when it hits a ; comment or a regex condition, then runs DRC against netclass clearances only, with a canary of 501 violations on a clean file dropping to 13 once a ; comment was added.ECAD · Agent failure · 1 report74
  16. 16kicad-tools current-path audit calls a 15 A path resolved while it changes layer through a single 0.3 mm via. A wire soldered on one side ends at that via, and the via carries the full 15 A, or 30 A pulsed. The ampacity rule has no via or layer-change record at all, so the audit reports the path fine.ECAD · Agent failure · 1 report74
  17. 17On a 4-layer board with custom clearance rules in .kicad_dru, the run reports 'DRC errors 0 -> 0 (in-process referee only)' and 'kicad-cli clearance errors 0 -> 1', then writes the board in place. No net is rolled back. The 0.29.0 tapeout skill runs this exact command as cleanup step 3, so a later gate refuses the board after the committed file has already been made worse, and someone has to work out which of the 11 kept nets did it.ECAD · Agent failure · 1 report74
  18. 18On a board whose only zones were GNDD, GNDA, +3.3V and +3.3VA, the auto-router guessed from the name that +5V was a pour net and skipped it. No zone existed for +5V. In their words, 'The net would have shipped open.'ECAD · Agent failure · 1 report74
  19. 19On a real 4-layer assembly board with 27 BOM lines and 78 LCSC placements, kct export with --merge-lcsc-from a seed BOM verifies every placement. kct readiness --generate on the same board fails the bom gate with '11 BOM line(s) require human part selection', because generate always writes a fresh bundle and has no way to pull LCSC numbers from the earlier one. The only path to READY is export then verify.ECAD · Agent failure · 1 report74
  20. 20On a real board the whole chain passed: check, cross-gate DRC, creepage, readiness READY, human sign-off, cart saved at JLCPCB. Then the owner opened the fab's gerber viewer and found the design unbuildable, with solder-mask openings missing and anchor holes in the wrong place. The tool records the human sign-off before the gerbers are even uploaded, so the name on the manifest vouched for a review that had not happened.ECAD · Agent failure · 1 report74
  21. 21On KiCad 10 name-only boards, the router keyed all kept copper to net 0, so every new trace joining its own net's existing copper counted as a short vs Net 0, reporting about 282 phantom shorts and exiting non-zero, while kicad-cli DRC found no short in either output. The run also promoted its output despite the error exit, and fix PR #8662 was opened about 12 minutes after the issue.ECAD · Agent failure · 1 report74
  22. 22On the same 4-layer DAC board, a schematic edit removed 8 caps, swapped 2 diode footprints, added 8 test points and rewired existing parts. kct sync reported value, footprint and orphan changes, but not the 30 pads on unchanged parts that now belong to a different net (a DAC mode strap moved from GND to 3.3 V, header pins moved off the rail). LVS caught it afterwards, but the tool whose job is to reconcile gives no list of what to change. A fix PR (#8707) opened right after.ECAD · Agent failure · 1 report74
  23. 23On v0.26.0, kct export resolves all 57 BOM lines to LCSC numbers, one by auto-match (four 16k 0805 resistors). kct parts availability on the same schematic lists that line as MISSING and prints "8/57 parts available", with about 48 valid, in-stock lines not counted anywhere in the summary. The author's words: just before an order, it "reads as 'most of the BOM is unavailable'." Ask is for both commands to resolve parts the same way and for the summary to add up to the total.ECAD · Agent failure · 1 report74
  24. 24The chained completion pass did not get the outer run's layers, voltage map, creepage settings, edge clearance or current paths, so it put 680 segments on the ground-pour layer and 687 mm of HV-class track where its class says to avoid inner layers. Worst creepage was 0.40 mm where 2.5 mm is required, and neither DRC engine flagged it because the written .kicad_dru also carries 0.3 mm. The fix still does not write the route's edge clearance into the .kicad_dru sidecar, so file DRC reads disagree with what the router was told.ECAD · Agent failure · 1 report74
  25. 25The kct optimize-traces command reported 0 DRC errors and 0 rollbacks on a routed 4-layer mains board, but kicad-cli then found a missing connection on /AC_NEUTRAL that the report never listed, and kct creepage failed on a new pair, SCAP_POS_RTN to GND at 0.43 mm against 0.45 mm required. Without flags, the dry run also assumed a 2-layer 1 oz board while the file says 4-layer 2 oz. A silent open on a mains net is a safety defect.ECAD · Agent failure · 1 report74
  26. 26The reverse case: prune --dry-run says the net is clean, but readiness on main flags a 0.02 mm wide same-layer loop and fails the warning_review gate, so the board cannot pass sign-off.ECAD · Agent failure · 1 report74
  27. 27The router only enforced its own default clearance plus a voltage-map creepage floor and never read the project netclass clearances or the .kicad_dru rules, so GATE_BUS_NEG at HV class 0.4 mm went in 0.20 to 0.39 mm from SRC_NEG and FUSED_LINE. Its per-link DRC gate committed the change anyway, leaving 29 clearance errors, and fix PR #8651 is open.ECAD · Agent failure · 1 report74
  28. 28The tool's own copper carve used 0.4 mm clearance while the board's .kicad_dru allowed 0.1016 mm, left 5 copper slivers, and then the export step refused the board; KiCad's own fill of the same board was DRC-clean. The fix rolls back to KiCad's fill when the carve is worse.ECAD · Agent failure · 1 report74
  29. 29A 40-pin header footprint with MountingHoles in its name gets dropped as a mounting hole, and the audit raises the CRITICAL item 'component in schematic missing from PCB, BOM will be unbuildable', while no-connect pins are flagged because the schematic and board name the same unconnected net differently. A false NOT READY costs a person an hour of proving the tool wrong.ECAD · Agent failure · 1 report66
  30. 30A DRC-clean board passed every tapeout gate with 15 exact duplicate copper segments, plus redundant branches, track ends off via centres and runs of 0.07 to 0.09 mm fragments. The dedupe tool finds all 15, but nothing in export or tapeout runs it. The rest was spotted by eye on a copper render. The user wants cleanup to always run.ECAD · Agent failure · 1 report66
  31. 31After a schematic change reassigns pads, tracks, vias and pour stubs can stay on the PCB carrying the old net. The sync command does not report or remove them and LVS only catches it afterwards. The issue defines stranded precisely, and PR #8713 adds a report plus an opt-in removal.ECAD · Agent failure · 1 report66
  32. 32After last night's fix, the chained completion pass refuses copper that adds a current-capacity error, but for every other class (geometric DRC errors, shorts, the HV pairwise audit), a pass that exits 8 is promoted without the chain looking at what its post-route checks found. A routing pass that exits with a link open gets promoted without its DRC being read.ECAD · Agent failure · 1 report66
  33. 33All six MIPI/TMDS pairs on one board came out with the same 0.597 mm skew, N side short every time; the tool's own check calls that 3.344 ps, inside its 3.36 ps budget, so the skew tuner leaves it, while kicad-cli's rule expresses the same budget as 0.4838 mm and warns. Two checks, one budget, two answers.ECAD · Agent failure · 1 report66
  34. 34An agent added a synthetic 12-net DRC test for trace rewrites. "Live verification NOT performed. The 54-net board is not available in this worktree," and the operator has to run it. "The synthetic fixture does not establish behaviour on that board."ECAD · Agent failure · 1 report66
  35. 35An np_thru_hole pad loaded with through_hole=False, so the grid router blocked it only on its own copper layer and inner and bottom-layer tracks could cross the drill. The fix blocks it on every layer at 0.25 mm hole clearance plus half the trace width, and the PR states live verification with kicad-cli was not performed.ECAD · Agent failure · 1 report66
  36. 36Bundles made by kct 0.29.0 or older now fail readiness --verify with fp-lib-table is absent from kicad_project.zip, confirmed by the reporter on a real bundle. The fix is just to re-export, but the message reads like a defect in the board.ECAD · Agent failure · 1 report66
  37. 37Fix PR for last hour's #8085: reinforce now uses class clearance floors, pairwise voltage map, and same-net hole-to-hole checks, but a live softstart rev-C run with kicad-cli pcb drc was NOT performed and tests use synthetic boards, so the board-level proof is still open.ECAD · Agent failure · 1 report66
  38. 38Freerouting routed every back-side SMD pad on F.Cu, and after import KiCad DRC reported 4 unconnected items plus 5 track_width errors from 0.15 mm segments on a 0.2 mm-minimum board.ECAD · Agent failure · 1 report66
  39. 39In a repo that installed only kicad-tools[parts], kct export --mfr jlcpcb logged "Report generation skipped" and exited 0. The bundle shipped without report.md, report.pdf or images, and the manifest didn't record the gap. Someone noticed later by comparing bundles with another consumer.ECAD · Agent failure · 1 report66
  40. 40kct check reports 78 silk_overlap warnings on a clean board, all inside single stock footprints at T-joints, while native kicad-cli DRC reports none; silk_overlap sits in the tapeout Gate 4b set, so every false positive forces an acknowledgement or refusal.ECAD · Agent failure · 1 report66
  41. 41kicad-tools tests ran DRC on the host's KiCad 10.0.8 while the developer believed they were on the pinned 10.0.6. Setting KCT_KICAD_DOCKER=1 only took effect inside the evidence toolchain, and 104 test files call find_kicad_cli() directly and got the host binary.ECAD · Agent failure · 1 report66
  42. 42On a 4-layer board with 16 declared current paths, prune removed 20 segments, snapped 12 ends and reported drc_verified true, but the current-paths audit then dropped from 14 resolved to 11. Each new failure names one of the stubs prune added. Prune's own kicad-cli verification passes, so nothing flags the regression at prune time.ECAD · Agent failure · 1 report66
  43. 43On a 4-layer board with 2 oz outer and 0.5 oz inner copper, 'kct check --copper 2' applies 2 oz to inner layers too, while readiness reads the stackup. Same inner trace, two answers: 16.37 mm required vs 65.48 mm for 15 A. Waivers recorded under one call go stale under the other, so a board clean at gate 1 gets BLOCKED at readiness with 25 errors and nothing pointing at the flag.ECAD · Agent failure · 1 report66
  44. 44On a KiCad 10 name-only board, a plain load and save "writes 56 (net N "name") header entries" with no edits at all. The library rebuilt the net table and wrote it back, changing the file's dialect. kicad-cli still loads it, so nothing flagged it.ECAD · Agent failure · 1 report66
  45. 45On a KiCad 10 name-only board, a plain load and save "writes 56 (net N "name") header entries" with no edits at all. The library rebuilt the net table and wrote it back, changing the file's dialect. kicad-cli still loads it, so nothing flagged it.ECAD · Agent failure · 1 report66
  46. 46Re-running the unmodified build script on main with the pinned toolchain no longer reproduces the committed routed board. One via moves, 18 segment and via lines differ. The maintainer could not say which copy is right, so the next change was patched into the committed board in place and re-pinned instead of rebuilt. The board in the repo and the board the scripts make have quietly split.ECAD · Agent failure · 1 report66
  47. 47Running kct pcb prune repeatedly on a routed board alternates between 707 and 706 segments. Each run removes 2 or 3 tiny in-pad segments, 0.01 to 0.07 mm long, and puts back others the previous run removed. The tapeout skill runs this in place, so the board hash depends on how many times cleanup ran.ECAD · Agent failure · 1 report66
  48. 48The audit record for a board stays in place when a later DRC is skipped or crashes, so the board still reads as audited, with the errors of an earlier board. Companion issue to #8695 in the same creepage series.ECAD · Agent failure · 1 report66
  49. 49The exporter still zips every sibling .kicad_pro and .kicad_sch in the board's folder, while readiness only counts files that match the PCB's name plus its schematic hierarchy. A folder with several board variants ships other boards' project files in the fab bundle.ECAD · Agent failure · 1 report66
  50. 50The first attended run of kct submit-jlcpcb against the live JLCPCB quote page found the driver's selectors were placeholders: 0 matching elements, 0 select boxes, every option a chip button. The author is doing the run by hand with Playwright to record real selectors.ECAD · Agent failure · 1 report66
  51. 51The JLCPCB check reports '0 global fiducials' on a board that has three, because it only counts footprints whose library name starts with the stock 'Fiducial:' nickname. A project-library fiducial does not count. The check blocks readiness, and the auto-fixer shares the same test, so it would add three more fiducials to a board that already has them. Workaround is to skip and acknowledge the warning by hand.ECAD · Agent failure · 1 report66
  52. 52The kct check and kct readiness commands now warn when there is no .kicad_pro, or only the stock one pcbnew writes, so a DRC clean result is not quietly measured against default rules. Earlier the same day a renamed board copy lost its custom rules the same way, 537 violations against 16.ECAD · Agent failure · 1 report66
  53. 53The kct place-silk-refs command reported 0 silk findings while kicad-cli DRC reported 5, silk over copper on four parts and one overlap. 28 of 79 references ended nearer another part's courtyard than their own, for example C45's label 4.9 mm from C45 and 0.6 mm from U5.ECAD · Agent failure · 1 report66
  54. 54The optimize-traces tool builds its optimizer with no collision checker, so on a dense, DRC-clean 4-layer board KiCad's DRC on the output found 103 shorting items, 51 clearance and 27 crossing violations plus 28 unconnected items. With the DRC-aware flag it rolled back 41 of 54 nets, and fix PR #8636 shipped with live verification not performed.ECAD · Agent failure · 1 report66
  55. 55The per-board record that decides whether a chained routing pass made things worse is built from the internal checker only, before native kicad-cli DRC runs. So copper that adds a native-only error class, such as shorts on net 0, crossing tracks or solder mask bridges, cannot be refused. The maintainer says it is read from code order and not yet measured, and that native DRC refills zones so finding positions may shift.ECAD · Agent failure · 1 report66
  56. 56The pin1_marker_missing rule fires on KiCad's own Hi-Link HLK-PMxx converter footprint, which has a filled triangle at the body edge 3.97 to 4.58 mm from pad 1, outside the rule's fixed 2.5 mm radius. The suggested workaround is a waiver file. A rule that is too literal produces noise that teaches people to waive.ECAD · Agent failure · 1 report66
  57. 57The readiness gate fails a board when one LCSC line has less live stock than the order needs, even when the parts are being bought into the fab's own parts inventory. The submit command has a flag for that case, the readiness command does not. The order size is hardcoded at 5 boards with no quantity option, and the same shortage is a WARN when the stock figure is a day old and a FAIL when it is live, so two runs on the same bundle disagree. Supply-chain state lives in three places and the gate only sees one.ECAD · Agent failure · 1 report66
  58. 58The same NPTH board run through both routers gave 0 hole_clearance errors from the grid engine and 2 from the lattice engine, at 0.1899 mm against a required 0.25 mm, because the lattice engine only kept the copper clearance from NPTH pads. The fix in PR #8686 notes live verification was not performed.ECAD · Agent failure · 1 report66
  59. 59The silkscreen reference placer commits positions that the JLCPCB checker in the same toolkit then flags as silk over copper or obscured. Workaround: the older pcbnew placer plus a nudge loop that keeps a move only when both kct check and kicad-cli are clean.ECAD · Agent failure · 1 report66
  60. 60The tool's own zone fill gets rejected by the tool's own export ('Saved zone fill is split where a refill is not'). Stale fills after edits also caused false clearance and LVS findings until zones were refilled.ECAD · Agent failure · 1 report66
  61. 61The trace optimizer's DRC-aware mode 'kept edits that kct check rejects' because its referee never loaded the project's net-class clearances from the .kicad_pro file. The fix stages the project file next to the scratch board. Two checks in the same toolchain read different rule sets, so one approved what the other failed.ECAD · Agent failure · 1 report66
  62. 62After every agent edit, a whole-board DRC has to run just to see findings near the edit, which is slow on large boards, and no region or reference scoping exists.ECAD · Agent failure · 1 report58

How it fails

  1. Agent failure62

Sourced from public community reports. Costs and delays on individual entries are modeled estimates, not measurements.