Index · Recurring errors

Hardware engineering error index

Recurring failures in CAD, ECAD, firmware, PLM and AI agent workflows, sourced from community reports. Ranked by impact, with the modeled cost to a team and the engineering tools that address each one.

Errors tracked
2,724
Software products
1,023
With a tool that helps
300
Updated
Nov 12, 2026

2,724 errors

  1. 1.Flipping a component with Konnect does not mirror inner copper layers the way KiCad does. On an 8-layer board the footprint moved sides but its pads stayed on In5.Cu instead of mirroring to In2.Cu, and 5 net-ties ended up tying LPDDR4 branch nets on the In5 GND plane layer instead of In2, with no warning.

    Konnect MCP server (KiCad) · hits the electrical engineer · $30k per team per year, modeled

  2. 2.kct creepage with --standard iec60664 keys the clearance lookup on steady-state peak working voltage instead of the rated impulse withstand voltage, so mains clearance comes out 0.2 mm instead of 1.5 mm: about 7x under-specified and non-conservative. The lookup table also carries 3200 V and 6300 V rows that are not on the IEC preferred impulse series. The curator reproduced every reported number against origin/main.

    kct (kicad-tools) creepage · hits the electrical engineer · $30k per team per year, modeled

  3. 3.A .kicad_dru rule says HV nets need 0.6 mm, but route.py prints it as handled, lists no unsupported rules, and ships HV copper 0.2 to 0.58 mm apart. With --clearance-ceiling 0.1 it also rewrites the .kicad_pro HV class to 0.1 mm, so kicad-cli DRC and check_drc both report a clean board.

    KiCadRoutingTools (drandyhaas) · hits the electrical engineer · $30k per team per year, modeled

  4. 4.A class-scoped disallow track layer rule is treated as consumed. route.py puts 11 HS tracks on B.Cu, check_drc says clean, board_score reports 0 blocking, while KiCad itself reports 11 items_not_allowed.

    KiCadRoutingTools (drandyhaas) · hits the electrical engineer · $30k per team per year, modeled

  5. 5.A pre-fab review of a 48V to 2V/100A converter: in the SPICE deck the two secondary half-windings meet at the center tap with opposite dot polarity, while the winding process card says the dotted ends join at the center tap, so if the winder follows the card the secondary gets built reversed. The author also notes tools/board_netlist.py only checks matching net names, so it cannot catch this, and asks for one dotted wiring drawing shared by sim, board netlist and card, plus a first-article polarity measurement.

    CZY (czy0126) · hits the electrical engineer · $30k per team per year, modeled

  6. 6.Agent requirements matrix passed 16 of 16 requirements even though every requirement's value, limit and margin were null, and after a fix 7 of 14 stayed 'no_data' while the numbers sat in other tools' results.

    MetaForge (FidelOdok) · hits the electrical engineer · $30k per team per year, modeled

  7. 7.An agent-generated board passed ERC and DRC while its schematics were just symbols with stubs and net labels, nothing actually wired, and MCU, charger and SOT-523 drivers were missing from every 3D view since v0.6.

    workspace-ee-test (ThyFriendlyFox) · hits the electrical engineer · $30k per team per year, modeled

  8. 8.An autonomous agent released a desk lamp as Ready for production and it could not be assembled: the board mounting holes missed the cover, the hinge washers did not fit their gaps, the diffuser was larger than its seat, and the USB-C socket sat 8 mm inside the board edge. The board DRC also failed, and five of the seven G-code files were sliced from older CAD revisions.

    MetaForge (FidelOdok) · hits the hardware engineer · $30k per team per year, modeled

  9. 9.Follow-up to issue 144 (still unfixed): one Part Studio imported 46 features fully, 14 partly, and skipped 9. One part's volume differs by 559.8% and one part is missing, and the second Part Studio matched neither part.

    cadrs (rvdende) · hits the mechanical designer · $30k per team per year, modeled

  10. 10.FreeCAD STEP import does not recognize identical objects.

    FreeCAD (FreeCAD) · hits the mechanical designer · $30k per team per year, modeled

  11. 11.Importing an Onshape Part Studio (PCB, lid, back enclosure) skipped 12 of 26 features because two custom reference planes have no importer, so every dependent sketch, extrude, chamfer, and Boolean dropped out. No part matched Onshape on volume and bounds (PCB 3.5% off, lid 3.1%, back part missing).

    cadrs (rvdende) · hits the mechanical designer · $30k per team per year, modeled

  12. 12.In a millimetre project, whole-number-of-feet beam-system spacing exported as feet divided by 304.8, so 2 ft 0 in landed in the IFC as 0.0066 instead of 609.6 (off by a factor of about 93,000) on Revit 2024 and 2026 with no warning.

    revit-ifc (Autodesk) · hits the product manager · $30k per team per year, modeled

  13. 13.In all four OpenRAM SRAM macros shipped under the sky130ram platform, a metal-only extraction finds vdd and gnd joined into one net.

    OpenROAD-flow-scripts (The-OpenROAD-Project) · hits the hardware engineer · $30k per team per year, modeled

  14. 14.KiCad's Specctra exporter writes wire coordinates with six significant digits, so past 100 mm a track that starts on a pad centre arrives up to half a micrometre off, and Freerouting only connects a trace end at the exact pin centre. On the 20 PCBench reference-routed boards, the router started with 5,586 unconnected items on boards that were complete in KiCad. With the 1 um snap it is 427, and unrouted-after-one-pass went from 941 to 90. The KiCad bug, #25850, is confirmed upstream but not fixed in the versions people use.

    freerouting (freerouting) · hits the electrical engineer · $30k per team per year, modeled

  15. 15.Obstacle filtering used a rotated exclusion zone's unrotated width and height, so the zone was dropped and the router reported solved: true while routing straight through it.

    tscircuit-autorouter (tscircuit) · hits the electrical engineer · $30k per team per year, modeled

  16. 16.On an AI-made board measured against datasheets, U2 was ordered as fixed 3.3 V LMQ62440 but wired with the adjustable divider, pushing the rail to about 10 to 11 V, a 5 V switch node is 0.125 mm across 29 mm because supply netclass patterns miss /Supply/5V_SW, and the LCSC field on U2 points to a DDR3L chip.

    Jetson-AI-Cam-CopperPilot (CopperPilot) · hits the electrical engineer · $30k per team per year, modeled

  17. 17.On the orbiter_kb board the final route step ships GND open, and only KiCad's refill catches it. The copper grading passed it. The tool's fill model counts a 106 mm2 B.Cu island as joined to the main flood, and KiCad does not, and the repair step cannot weld the link either, because kicad-cli anchors the zone end at an outline corner that sits off the board.

    KiCadRoutingTools (drandyhaas) · hits the electrical engineer · $30k per team per year, modeled

  18. 18.The TwinCAT MCP server's XAE calls compared nothing about which solution the attached shell had open: when the user closed one project and opened another machine's project in a second shell, the dead proxy re-attached to whatever came first and edited the other machine's PLC project. The backend now binds the solution and checks it before every call.

    twincat-mcp-server (Disectron) · hits the hardware engineer · $30k per team per year, modeled

  19. 19.With Force=true and AllowUnresolvedLibrary=true, the EnableConfig step treated a build with codeVerified=false as complete, cleared BUILD_REQUIRED, then went through Activate, Download, and PLC Run, returning success with a null top-level warning.

    AI-TwinCAT-Skill (Lance0901) · hits the firmware engineer · $30k per team per year, modeled

  20. 20.With LA and LB labels swapped, Magic plus Netgen is a KNOWN FALSE PASS on LVS while KLayout fails as expected, so two LVS flows disagree on the same cell.

    open-pdks-regression-tests (iic-jku) · hits the hardware engineer · $30k per team per year, modeled

  21. 21.With the synthesis path on, the block kept default DEF units of 100 instead of 1000, so the final GDS streamed every coordinate truncated to 10 nm on a 1 nm process, producing 24,714 DRC markers and an LVS mismatch of 66 nets and 625 instances while the database itself was correct.

    OpenROAD-flow-scripts (The-OpenROAD-Project) · hits the electrical engineer · $30k per team per year, modeled

  22. 22.Every Luban MCP motion guard refuses while headPower > 0 or headStatus is on, but on the Snapmaker Ray the firmware sets the laser power reading to 0 at init and never writes it, and no SACP channel sets headStatus. The guards therefore always pass on the Ray whatever the laser is doing, and results imply the toolhead is off. Safety-relevant: the agent can move a firing laser believing it is off.

    Luban MCP (Snapmaker Ray) · hits the hardware engineer · $30k per team per year, modeled

    Low confidence
  23. 23.An agent-driven router placed a GND plane-tap via dead centre in the USB plug's GND contact finger: the mating surface that slides into the socket. A drilled hole there damages the plating the socket wipes against, and nothing graded it: check_drc sees a same-net via in a same-net pad as legal copper, check_assembly said buildable, and board_score reached blocking 0, so the defect shipped with every grader clean.

    KiCadRoutingTools (KiCad MCP routing skill) · hits the electrical engineer · $24k per team per year, modeled

  24. 24.Freerouting can insert a complete new route, delete it as a dangling tail before the final endpoint attaches, and still return ROUTED while the connection is missing: on the C4 net of the Corney Island wireless board the maze found a valid 150 um bridge, stub cleanup deleted the whole bridge, the later attachment added only a tiny stub, and KiCad confirms C4 is still disconnected.

    freerouting · hits the electrical engineer · $24k per team per year, modeled

  25. 25.kct audit prints READY FOR MANUFACTURING and exits 0 in three cases where ERC or the sync check never ran: on macOS where kicad-cli is not on PATH, the ERC check raises FileNotFoundError which is coerced to passed=True; an ERC timeout leaves blocking_error_count at 0 so the verdict reads READY while the table says ERC: FAIL; a crashed schematic/PCB sync check is logged at debug level and also yields READY.

    kct (kicad-tools) audit · hits the electrical engineer · $24k per team per year, modeled

  26. 26.Moving a component onto another net's via through Konnect's IPC move silently re-nets the copper: KiCad changes the via's net to the moved pad's net. A ground stitching via took on the test point's supply net and the ground plane lost it, while DRC stayed clean. A synthetic repro with KiCad's own Python shows a closed-file move does not re-net, so the hazard is specific to the agent's live move path.

    Konnect MCP server (KiCad) · hits the electrical engineer · $24k per team per year, modeled

  27. 27.The ESP32 device broker could report a fixed workload valid/succeeded even though the device threw InternalError: interrupted after END: VM exceptions, app errors, watchdog trips and stop-hook failures at the teardown boundary were not rejected, and old results kept terminal_success_verified true. The agent was told a hardware run passed when the board had faulted.

    esp-device-broker-mcp (dj-oyu) · hits the hardware engineer · $24k per team per year, modeled

  28. 28."Every fab's quote form asks for copper weight, laminate, Tg, mask and silk colour, gold fingers, via protection, castellation" and minimum trace/space/drill. "None of the quoting sites read any of it from a KiCad project, so it was retyped by hand for every order or silently left to the fab's default." They added a fabrication block to project.yaml that writes the KiCad stackup and a board-specs.md into every release package.

    BLPL (CK-Consulting) · hits the electrical engineer · $30k per team per year, modeled

  29. 29."IPCB_LayerStack_V7.InsertInStackAbove / Below on a layer already in the stack leaves it where it is, with no error." The fix goes through the stack manager's own move. Because every move applies the manager's copy to the board, the tool now refuses to move while the two copies disagree, since a move would write the stale values over the board. A silent no-op API is the same failure as a false pass. The author had to build the comparison from #187 first just to make moving a layer safe.

    eda-agent (salitronic) · hits the electrical engineer · $30k per team per year, modeled

  30. 30."IPCB_LayerStack_V7.InsertInStackAbove / Below on a layer already in the stack leaves it where it is, with no error." The fix goes through the stack manager's own move. Because every move applies the manager's copy to the board, the tool now refuses to move while the two copies disagree, since a move would write the stale values over the board. A silent no-op API is the same failure as a false pass. The author had to build the comparison from #187 first just to make moving a layer safe.

    eda-agent (salitronic) · hits the electrical engineer · $30k per team per year, modeled

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